; ARM assembly tutorial for Asmonite, example 12: a table of words (Raspberry Pi Pico 2, Arm Cortex-M33).
; Adapted from the ARM-ASM-Tutorial by Niklas Guertler (examples BlinkPattern and BlinkPattern2);
; see LICENSE.txt.
;
; The lengths of the on and off times come from a table: three short, three long, three short (SOS).
; "ldr r0, [r7, r8, lsl #2]" reads the word number r8 of the table at r7: the address is r7 + r8 * 4.
; "cmp" and "blo" (branch if lower, unsigned) end the loop after the last entry. The entry count is the
; size of the table divided by 4: (blink_table_end - blink_table) / 4, worked out by the assembler.
.target pico2
.arch thumb
.imagebase 0x20000000

RESETS_BASE         equ 0x40020000
RESETS_RESET_DONE   equ 0x08
RESET_BITS          equ (1 << 6) | (1 << 9)     ; IO_BANK0, PADS_BANK0
IO_BANK0_BASE       equ 0x40028000
GPIO25_CTRL         equ 0xcc
FUNCSEL_SIO         equ 5
PADS_BANK0_BASE     equ 0x40038000
PADS_GPIO25         equ 0x68
PAD_ISO             equ 1 << 8
SIO_BASE            equ 0xd0000000
SIO_GPIO_OUT_SET    equ 0x18
SIO_GPIO_OUT_CLR    equ 0x20
SIO_GPIO_OE_SET     equ 0x38
ALIAS_CLR           equ 0x3000

_start:
    bl   setup_led
    bl   blink_pattern
    b    $

; ---- blink once through the table ----
blink_pattern:
    push {r4, r5, r6, r7, r8, r9, r10, lr}
    ldr  r4, lit_sio
    ldr  r5, lit_led_bit
    adr  r7, blink_table        ; r7 = the address of the table
    movs r8, #0                 ; r8 = the number of the entry
    movs r9, #(blink_table_end - blink_table) / 4
pattern_loop:
    str  r5, [r4, #SIO_GPIO_OUT_SET]
    ldr  r0, [r7, r8, lsl #2]   ; the on time
    add  r8, r8, #1
    bl   delay
    str  r5, [r4, #SIO_GPIO_OUT_CLR]
    ldr  r0, [r7, r8, lsl #2]   ; the off time
    add  r8, r8, #1
    bl   delay
    cmp  r8, r9
    blo  pattern_loop
    pop  {r4, r5, r6, r7, r8, r9, r10, pc}

delay:
    subs r0, r0, #1
    bne  delay
    bx   lr

; ---- IO_BANK0 and PADS_BANK0 out of reset, GPIO 25: SIO, output; changes r0 .. r2 ----
setup_led:
    ldr  r1, lit_resets_clr
    ldr  r0, lit_reset_bits
    str  r0, [r1]
    ldr  r1, lit_resets
setup_wait:
    ldr  r2, [r1, #RESETS_RESET_DONE]
    and  r2, r2, r0
    cmp  r2, r0
    bne  setup_wait
    ldr  r1, lit_pads_clr
    mov  r0, #PAD_ISO
    str  r0, [r1, #PADS_GPIO25]
    ldr  r1, lit_io_bank0
    movs r0, #FUNCSEL_SIO
    str  r0, [r1, #GPIO25_CTRL]
    ldr  r1, lit_sio
    ldr  r0, lit_led_bit
    str  r0, [r1, #SIO_GPIO_OE_SET]
    bx   lr

    align 4
blink_table:
    dd 1000000, 1000000, 1000000, 1000000, 1000000, 1000000
    dd 2500000, 1000000, 2500000, 1000000, 2500000, 1000000
    dd 1000000, 1000000, 1000000, 1000000, 1000000, 4000000
blink_table_end:

lit_resets:      dd RESETS_BASE
lit_resets_clr:  dd RESETS_BASE + ALIAS_CLR
lit_reset_bits:  dd RESET_BITS
lit_pads_clr:    dd PADS_BANK0_BASE + ALIAS_CLR
lit_io_bank0:    dd IO_BANK0_BASE
lit_sio:         dd SIO_BASE
lit_led_bit:     dd 1 << 25