; ARM assembly tutorial for Asmonite, example 18: the SysTick interrupt (Raspberry Pi Pico 2, Arm Cortex-M33). ; Adapted from the ARM-ASM-Tutorial by Niklas Guertler (example BlinkSysTickInterrupt, sections ; "Exceptions & Interrupts" and "Improved vector table"); see LICENSE.txt. ; ; Now the core does not wait at all: it sleeps in "wfi" (wait for interrupt), and the SysTick calls the ; function systick_handler by itself at each event (TICKINT, bit 1 of SYST_CSR). The core finds the ; handler in the vector table: entry 15 is the SysTick. The table is at the start of the program, in the ; RAM at 0x20000000; the program writes this address into VTOR (0xe000ed08), the register that tells the ; core where its table is. An exception saves r0 .. r3, r12, lr, pc and xPSR on the stack by itself, so the ; handler is an ordinary function that ends with "bx lr". ; The state lives in two bytes in the RAM: blink_step (the entry of the table) and timer_events (events ; left for this entry). Set a breakpoint in systick_handler (F5) and press F9. .target pico2 .arch thumb .imagebase 0x20000000 RESETS_BASE equ 0x40020000 RESETS_RESET_DONE equ 0x08 RESET_BITS equ (1 << 6) | (1 << 9) ; IO_BANK0, PADS_BANK0 IO_BANK0_BASE equ 0x40028000 GPIO25_CTRL equ 0xcc FUNCSEL_SIO equ 5 PADS_BANK0_BASE equ 0x40038000 PADS_GPIO25 equ 0x68 PAD_ISO equ 1 << 8 SIO_BASE equ 0xd0000000 SIO_GPIO_OUT_SET equ 0x18 SIO_GPIO_OUT_CLR equ 0x20 SIO_GPIO_OE_SET equ 0x38 ALIAS_CLR equ 0x3000 SCS_BASE equ 0xe000e000 SYST_CSR equ 0x10 SYST_RVR equ 0x14 SYST_CVR equ 0x18 SCB_VTOR equ 0xd08 COUNTFLAG equ 1 << 16 TIMER_VALUE equ 1500000 SRAM_END equ 0x20082000 vectors: dd SRAM_END ; 0: the stack pointer at the start dd _start + 1 ; 1: reset dd hang + 1 ; 2: NMI dd hang + 1 ; 3: HardFault dd hang + 1 ; 4: MemManage dd hang + 1 ; 5: BusFault dd hang + 1 ; 6: UsageFault dd hang + 1 ; 7: SecureFault dd 0, 0, 0 ; 8 .. 10: reserved dd hang + 1 ; 11: SVCall dd hang + 1 ; 12: DebugMonitor dd 0 ; 13: reserved dd hang + 1 ; 14: PendSV dd systick_handler + 1 ; 15: SysTick _start: ldr r0, lit_scs adr r1, vectors str r1, [r0, #SCB_VTOR] ; the vector table is ours adr r0, blink_step movs r1, #0 strb r1, [r0] ; blink_step = 0 adr r2, blink_table ldrb r1, [r2] ; the first entry of the table adr r0, timer_events strb r1, [r0] bl setup_led ldr r0, lit_sio ldr r1, lit_led_bit str r1, [r0, #SIO_GPIO_OUT_SET] ; the first step: LED on ldr r0, lit_timer_value bl start_systick cpsie i ; allow interrupts (PRIMASK = 0): the boot ROM may leave them off sleep_loop: wfi ; sleep until an interrupt b sleep_loop ; ---- called by the SysTick at every event ---- systick_handler: adr r0, timer_events ldrb r3, [r0] subs r3, r3, #1 ; one event less itt ne strbne r3, [r0] ; not yet 0: store it bne handler_done ; and return adr r0, blink_step ldrb r1, [r0] adds r1, r1, #1 ; the next entry cmp r1, #(blink_table_end - blink_table) it hs movhs r1, #0 ; after the last one: from the start again strb r1, [r0] adr r2, blink_table ldrb r3, [r2, r1] ; its number of events adr r0, timer_events strb r3, [r0] ldr r0, lit_sio ldr r2, lit_led_bit tst r1, #1 ; even entry: on, odd entry: off ite eq streq r2, [r0, #SIO_GPIO_OUT_SET] strne r2, [r0, #SIO_GPIO_OUT_CLR] handler_done: bx lr ; ---- start the SysTick with its interrupt: r0 = cycles between two events ---- start_systick: ldr r1, lit_scs str r0, [r1, #SYST_RVR] movs r0, #0 str r0, [r1, #SYST_CVR] movs r0, #7 ; ENABLE | TICKINT | CLKSOURCE str r0, [r1, #SYST_CSR] bx lr hang: b hang ; ---- IO_BANK0 and PADS_BANK0 out of reset, GPIO 25: SIO, output; changes r0 .. r2 ---- setup_led: ldr r1, lit_resets_clr ldr r0, lit_reset_bits str r0, [r1] ldr r1, lit_resets setup_wait: ldr r2, [r1, #RESETS_RESET_DONE] and r2, r2, r0 cmp r2, r0 bne setup_wait ldr r1, lit_pads_clr mov r0, #PAD_ISO str r0, [r1, #PADS_GPIO25] ldr r1, lit_io_bank0 movs r0, #FUNCSEL_SIO str r0, [r1, #GPIO25_CTRL] ldr r1, lit_sio ldr r0, lit_led_bit str r0, [r1, #SIO_GPIO_OE_SET] bx lr blink_table: db 2, 2, 2, 2, 2, 2 db 5, 2, 5, 2, 5, 2 db 2, 2, 2, 2, 2, 8 blink_table_end: blink_step: db 0 timer_events: db 0 align 4 lit_resets: dd RESETS_BASE lit_resets_clr: dd RESETS_BASE + ALIAS_CLR lit_reset_bits: dd RESET_BITS lit_pads_clr: dd PADS_BANK0_BASE + ALIAS_CLR lit_io_bank0: dd IO_BANK0_BASE lit_sio: dd SIO_BASE lit_led_bit: dd 1 << 25 lit_scs: dd SCS_BASE lit_timer_value: dd TIMER_VALUE