Assembler for the Raspberry Pi Pico and Pico 2

Two boards, three cores

The Pico has Arm cores, the Pico 2 two kinds of cores; the boot ROM chooses which runs from the program in the flash. Asmonite writes programs for all three and debugs core 0 of each.

The Pico (RP2040)

The Cortex-M0+ knows the instructions of the ARMv6-M, and a flash program starts with a boot2 block. File: examples\pico\blink_flash.asm.

.target pico
.arch thumb
.imagebase 0x10000000   ; flash

    .boot2                 ; 256 bytes that set up the flash chip
vectors:                   ; at 0x10000100
    dd 0x20042000          ; stack pointer
    dd _start + 1          ; start address (+1: Thumb code)
_start:
    ldr  r0, resets_clr    ; a 32-bit constant from a word behind the code
    ...

With .target pico the assembler allows the instructions of the ARMv6-M only: 16-bit Thumb, of the 32-bit ones only bl, msr, mrs and the barriers. There is no movw/movt, no cbz and no it; any other instruction is an error with its line. .boot2 puts in the boot2 block of the Pico SDK (BSD-3-Clause, in the ZIP and built into Asmonite), with its CRC-32 that the boot ROM checks. For a board with another flash chip, .boot2 file.bin takes a block of your own.

The Pico 2: the same program in Arm and RISC-V

The LED at GPIO 25 blinks: switch on the output, then toggle it in a loop and wait. Files: examples\pico2\blink_arm_ram.asm and blink_ram.asm (shortened).

.target pico2
.arch thumb
.imagebase 0x20000000   ; RAM

_start:
    ...                      ; pads and GPIO
    movw r0, #(SIO_BASE & 0xffff)
    movt r0, #(SIO_BASE >> 16)
    movw r1, #(LED_MASK & 0xffff)
    movt r1, #(LED_MASK >> 16)
blink_loop:
    str  r1, [r0, #SIO_GPIO_OUT_XOR]
    movw r2, #(DELAY_COUNT & 0xffff)
    movt r2, #(DELAY_COUNT >> 16)
delay:
    subs r2, r2, #1
    bne  delay
    b    blink_loop

.target pico2
.arch riscv32
.imagebase 0x20000000   ; RAM

_start:
    li   sp, SRAM_END
    ...                      ; pads and GPIO
    li   t0, SIO_BASE
    li   t1, LED_MASK
blink_loop:
    sw   t1, SIO_GPIO_OUT_XOR(t0)
    li   t2, DELAY_COUNT
delay:
    addi t2, t2, -1
    bnez t2, delay
    j    blink_loop

RISC-V has no flags: bnez compares and branches in one instruction, and li builds a 32-bit constant from lui and addi. Arm loads it in two halves with movw and movt, subs sets the flags and bne branches on them. The peripherals are the same on both cores: registers at fixed addresses, each with aliases that flip, set or clear bits.

Connect and debug

1. Connect the debug probe. The Raspberry Pi Debug Probe or a second Pico with the debugprobe firmware (CMSIS-DAP). Three wires to the debug pins: SWCLK, GND, SWDIO. The board gets its power over its own USB cable. Windows needs no driver.
2. Choose the target. Under Debug > Debug targets choose Raspberry Pi Pico (RP2040) or Raspberry Pi Pico 2 (RP2350) and press Test the connection. It says whether the board answers and which cores run.
3. Start. Open an example and press F7: Asmonite assembles, reads the chip id of the board, writes the program and stops at _start. F7 and F8 take a step, F9 runs, F4 runs to the cursor, F5 sets a breakpoint, Debug > Pause stops.
4. Look and change. On the right are the registers (a double click changes a value) and the stack with notes where a value points into your program. The memory view shows bytes or, switched to Code, the instructions from an address with your labels.

If the program does not fit the board at the probe (a Pico program at a Pico 2, or the other way round), Asmonite refuses it with the name of the board and writes nothing.

RAM, flash and UF2

Switching between RISC-V and Arm. The RP2350 runs one kind of cores at a time. If you start a flash program for the other kind, Asmonite writes it into the flash with the cores that run, resets the chip, and the boot ROM starts the cores the program is for. This takes about two seconds. A RAM program cannot switch; Asmonite then says which flash program to start first.

Without OpenOCD. Asmonite speaks CMSIS-DAP over USB and through it SWD with the chip: the debug module of the RISC-V cores, the debug registers of the Arm cores, the multidrop bus of the RP2040. If you still want OpenOCD, you can choose it as a backup for the RISC-V cores (host and port of its GDB server).

What is not (yet) there

• Core 0 only; the second core is not debugged.
• The RISC-V assembler writes no compressed instructions (c.*); the disassembler reads them.
• The W models (Pico W, Pico 2 W) work, but their LED is on the wireless chip, which the examples do not drive.
• Asmonite runs on Windows; the debug probe has to be connected to that computer.

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